Design and Analysis of Devices and Circuits based on Correlated Materials

Open Access
- Author:
- Sibert, Kyle Thomas
- Area of Honors:
- Electrical Engineering
- Degree:
- Bachelor of Science
- Document Type:
- Thesis
- Thesis Supervisors:
- Sumeet Kumar Gupta, Thesis Supervisor
Jeffrey Scott Mayer, Thesis Honors Advisor - Keywords:
- Electrical Engineering
Correlated Materials
Circuit Design - Abstract:
- In this thesis, we explore the design of novel devices and circuits employing correlated materials. Correlated material can behave as a metal or an insulator depending on applied voltage and temperature. Connecting these materials to the source of a standard transistor results in a hyperfet, for which the subthreshold swing can be lower than the 60 mV/decade limit that standard transistors exhibit. Four material parameters control the behavior of a correlated material: ρi, ρm, JcIMT, and JcMIT. These parameters are the resistivities and critical current densities that dictate the correlated material's phase transitions. The resistivity for the insulator phase is ρi, and the resistivity for the metallic state is ρm. Also, the critical current density during the insulator-to-metal transition (IMT) is JcIMT, and the critical current density during the metal-to-insulator transition (MIT) is JcMIT. It is important to understand the relationship between these material parameters and hyperfet behavior to be capable of optimally designing the device. Use of correlated materials for flip-flop design is also investigated. A traditional flip-flop utilizes master and slave latches to read data from its input and pass it to its output on a clock pulse edge. This master-slave configuration is necessary to implement an edge-triggered flip-flop because latches are level sensitive components. As an alternative to using master and slave latches, a switch based on correlated materials triggering at the clock edge is designed to implement an edge-triggered flip-flop with a single latch. Using correlated material-based edge-triggered switches, a new flip-flop can be implemented with a drastic reduction in the area of the flip-flop.