Compiler Support for Offloading off-the-shelf Applications to PIM Cores
Open Access
- Author:
- Patel, Aditya
- Area of Honors:
- Computer Science
- Degree:
- Bachelor of Science
- Document Type:
- Thesis
- Thesis Supervisors:
- Anand Sivasubramaniam, Thesis Supervisor
John Joseph Hannan, Thesis Honors Advisor
Vijaykrishnan Narayanan, Faculty Reader - Keywords:
- LLVM
PIM
Compiler
Processing in memory - Abstract:
- For decades, computing has been focused primarily on a Central Processing Unit (CPU). Improvements in semiconductor manufacturing (as predicted by Moore’s law) and innovations in CPU Microarchitecture have played an important role in advancing computing performance and energy efficiency. Today, Moore’s law has slowed down as complexity of leading-edge fabrication technologies has risen considerably; indeed, many believe that Moore’s law will be nearing its end in the coming decade. In order to improve the computing performance, there is a shift towards adoption of specialized hardware to accelerate specific workloads. These accelerators have been increasingly used in industry and academia to speed up specific applications that would otherwise run slower on a CPU. These applications include, but is not limited to Machine Learning, Data Analysis, and Scientific Computing. Innovations in specialized hardware and supporting software stack will play a huge role in advancement of computing. One notable research area is processing-in-memory (PIM), wherein computing elements are placed near memory to take advantage of massive bandwidth and higher latency. However, there remain many challenges that hinder wide spread adoption of accelerators such as PIM. One challenge is that programmers usually have to write specialized code for a given accelerator, which is considerably harder than writing a “generalized” code for CPU. Another challenge is to seamlessly test applications on a new specialized hardware (which can be real or simulated). In order to address these challenges, we explore the possibility of taking (source code of) “off-the-shelf” applications and accelerate them on general purpose processing-in-memory (PIM) cores. In this thesis, we present a compiler-based framework to address this challenge. As a proof of concept, we take Phoenix MapReduce Benchmark written in C for x86 CPU core and run it on RISC-V Processing-in-Memory (PIM) cores (simulated on gem5).