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Start Over Area of Honors Electrical Engineering Thesis Supervisor Sumeet Kumar Gupta Keyword MOSFET Access Level open_access

1. Digital Logic Design Based on Negative Capacitance Field Effect Transistors

open_access

Open Access

Author:: Steiner, Mark R
Title:: Digital Logic Design Based on Negative Capacitance Field Effect Transistors
Area of Honors:: Electrical Engineering
Keywords:: ferroelectric
transistor
digital logic design
SRAM
6T cell
logic inverter
MOSFET
File:: Download master.pdf
Thesis Supervisors:: Sumeet Kumar Gupta, Thesis Supervisor
Professor William Evan Higgins, Thesis Honors Advisor